Electronic circuits are often manufactured as integrated circuits formed by processing silicon wafers. Many such wafers contain individual circuit designs where the individual circuits are cut into dies. The individual dies (chips) are subsequently mounted in manufacturing processes on a single substrate. The substrate is typically separated into separate carriers (or chip packages) by cutting the substrate with a saw or a laser. The substrate is cut along saw lane spaces provided between adjacent mounted dies. However, sawing along the saw lanes (for singulating the mounted dies) can jeopardize the integrity of a mounted die, because of potential contaminants freed by sawing operation. Such constraints have led to increased cost, increased device footprints, and increased thermal management issues.